Chip manufacturers often spend huge amounts of time and effort in the area of Design-For-Manufacturability (DFM) where specific rules are defined to help guide designers, or process-related sensitivity information is captured in an abstract or model format and provided to designers for manufacturability simulations. This allows actions to be taken in design change before tape out to improve manufacturability. However, the reality is that in advanced designs it may not be possible to comply with all the foundry-specified DFM rules. Many are not feasible based on timing, area and/or power requirements, or due to specific design techniques needed. Besides, there could exist specific design features that are sensitive to the process variation but are of black-box to the foundry.
There is, therefore, a need for a solution to fill the gaps between the design and manufacturing domains to ensure good process and product yield.